1. Field of the Invention
This invention relates to computer systems and, more particularly, to a RAMDAC (random access memory-digital-to-analog converter) used to transfer and process data from a frame buffer to an output display device.
2. History of the Prior Art
One of the significant problems involved in increasing the operational speed of desktop computers has been in finding ways to increase the rate at which information is transferred to an output display device. Many of the various forms of data presentation which are presently available require that large amounts of data be transferred. For example, if a computer output display monitor is operating in a color mode in which 1280.times.1024 pixels are displayed on the screen at once and the mode is one in which thirty-two bits are used to define each pixel, then a total of over forty million bits of information must be transferred to the screen with each individual picture (called a "frame"} that is displayed. Typically, sixty frames are displayed each second so that over one and one-half billion bits must be transferred each second in such a system. This requires a very substantial amount of processing power.
In order to provide such a large amount of information to an output display device, computer systems typically utilize a frame buffer which holds the pixel data which is to be displayed on the output display.
Typically a frame buffer offers a sufficient amount of random access memory to store one frame of data to be displayed. The information in the frame buffer is transferred to the display from the frame buffer sixty or more times each second. After (or during) each transfer, the pixel data in the frame buffer is updated with the new information to be displayed in the next frame.
In DRAM frame buffers, pixel data may be read from the same port as data is written. VRAM frame buffers add a separate video data port so that the main pixel port remains free for rendering. Two-ported video random access memory (VRAM) or frame buffer random access memory (FBRAM) has been substituted for dynamic random access memory so that information may be transferred from the frame buffer to the display at the same time other information is being loaded into the frame buffer.
The data from the frame buffer is input to circuitry which converts the data from the frame buffer memory to a form usable by the output display device. FIG. 1 shows a computer system in which the present invention may be utilized where data in a memory 11 from a host CPU 12 is placed on host bus 13 and passed by rendering controller 14 to the frame buffer memory (shown as VRAMs 15a-15d, which may also be FBRAMs). A RAMDAC 21 is coupled to the host bus through the rendering controller and to the frame buffer memories and includes a look-up table (or LUT which is the RAM part of the RAMDAC) and other elements for translating 16 bit data from the frame buffer memory to a 64 or 128 bit digital RGB signal which is converted by a digital to analog converter (DAC) to three analog signals representing voltage levels for red, blue and green which when combined at a pixel location in monitor 25 create a desired color at that pixel. The particulars of the frame buffer memory, rendering controller and monitor components are well known in the art and will not be described herein except as necessary for a proper understanding of the invention. In this connection, for the most part, the present invention is directed to certain improvements to RAMDAC 21 which provide the enhanced capabilities of the invention.